AKINOLA SAMUEL OWOLABI

Embedded Software Developer, Cloud Platform Engineer

Cloud Platform (Devops) Engineering

I build and maintain platforms that automates the deployment of software applications, ensuring quality releases by running various automated tests and monitoring the performance of the application- of course, that is as well automated

Cloud Native Project- Container orchestration using Kubernetes

This project entails packaging and deploying an online news sharing platform to Kubernetes using CI/CD pipeline.

TECHNOLOGY: Python, Github Action, Docker, Kubernetes, Vagrant, ArgoCD
Link to Github repo

Ensuring quality release

The project entails creating automated test suites and evaluating the performance of the applications and resources under certain load conditions.

TECHNOLOGY: Github Action, Postman, JMeter, Selenium, Azure pipeline
Link to Github repo

Operationalize a machine learning application

This project entails operationalizing a Machine Learning Microservice API by integrating an Azure Cloud Shell environment to set up a continuous delivery pipeline to build, deploy and test a flask machine learning application.

TECHNOLOGY: Azure CLoud Shell,Github Action, Azure pipeline, Locust
Link to Github repo

Operationalize a machine learning application

This project entails deploying a customizable and scalable cluster of servers with load balancer by implementing Infrastructure as Code using Packer and Terraform.

TECHNOLOGY: Azure CLoud Shell,Terraform, Packer
Link to Github repo

Hardware/Software Co-design

I am an Embedded Software Engineer who enjoys using High Level Synthesis to automate the design of custom accelerators on System On Chips to achieve high performance and reduction in load area and optimize resource utilization

Hardware/Software co-design of a deep learning approach for detection of Arrhythmia on low power FPGA resources

designing custom hardware acceleration that makes detection of arrhytmia faster and even better at low resources utilization would be highly beneficial. In this project, I explored high level synthesis to generated the morlet wavelet IP that converts, the 1-D time series signal to 2D image that can be inferred by the model on the Zybo board

HARDWARE: Zybo board,
SOFTWARE: C++,HLS, Vivado, Vitis
Link to Github repo

Hardware/Software co-design of Short Time Fourier Transform on low power FPGA resources

Hardware acceleration of STFT offer great benefits in terms of improving the latency, cost, energy utilization, computational speed I was able to achieve a 186% increase in computational speed at low energy.

HARDWARE: Zybo board,
SOFTWARE: C++,HLS, Vivado, Vitis
Link to Github repo

Hardware/Software co-design of robotics motion planning RRT-Star algorithm on low power FPGA resources

A rapidly exploring random tree (RRT) is an algorithm designed to efficiently search nonconvex, high-dimensional spaces by randomly building a space-filling tree. However, the algorithm is computationally expensive. Reducing the cost would have a significant impact and benefit to the industry.

HARDWARE: Zybo board,
SOFTWARE: C++,HLS, Vivado, Vitis
Link to Github repo

Breadth First Search Algorithm

BFS is an algorithm for looking for nodes in a tree data structure that satisfy a specified property. Before moving on to the nodes at the next depth level, it begins at the root of the tree and investigates every node there.

TECHNOLOGY: MATLAB

Rapidly exploring Random Tree

The Rapid expanding Random Tree is a path planning algorithm that uses random smaples from the search space too construct a tree. The root of the tree is the starting point. Each node has only one parent. In this project, the RRT algorithm was implemented in MATLAB with GUI for visualization of the tree growth

TECHNOLOGY: MATLAB